Vicom Systems FC-FC3 Bedienungsanleitung PDF herunterladen (Seite 29)

CONFIDENTIAL [AK8999A/AW/AD]

MS1600-E-00 2014/05

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Functional Description

1) Adjustment Procedure Description (Example)

The adjustment procedure for the AK8999A follows (See “Adjustment Sequence”).

Note) Keep the sequence as adjustment of VREF adjustment, IREF adjustment, OSC adjustment, and

VTMP adjustment in turn. If VREF adjustment and IREF adjustment are performed after OSC

adjustment, adjusted OSC frequency will shift.

The EEPROM address is referred to as “address”, while the control register (volatile memory)

address is referred to as “C address”.

1.1) VREF Adjustment (completed when shipped in package form)

The reference voltage is adjusted to 1.0V by VREF voltage adjustment EEPROM (address: 0Fh, data:

EVR[2:0]). Adjusting the VREF voltage also means adjustment of the sensor drive voltage (VS). VREF

voltage is observed at VOUT pin (See “Recommended External Circuits”) while the CSCLK pin

High (CSCLK High Time) after the writing of an adjustment mode register (C address: 00h, data:

AM[3:0] = 1h).

1.2) IREF Adjustment (completed when shipped in package form)

The reference current is adjusted to 1.0µA.

The external resistor (1M) is connected to VOUT pin. Reference current is supplied to the external

resistor, and IREF current adjustment EEPROM (address: 0Fh, data: EIR[3:0]) is adjusted so that the

voltage across the both ends of the external resistor is set to 1.0V. And it can adjust more accurate by

taking into consideration the input impedance (input resistance) of adjustment equipment. With 1M

external resistor to the VOUT pin, it is adjusted in voltage domain. The external 1M should be

connected only at the time of IREF adjustment. When with resistance 1M is connected always in

outside, please be careful of the input impedance of adjustment equipment. The input impedance of

adjustment equipment should become more than 10G. IREF current is observed at VOUT pin (See

“Recommended External Circuits”) while the CSCLK pin High (CSCLK High Time) after the

writing of an adjustment mode register (C address: 00h, data: AM[3:0] = 2h).

VOUT

CSCLK

1 4 169

Twr_REG

Hi-z

VREF monitor

CSCLK High Time

Analog

Output

VOUT

CSCLK

1 4 169

Twr_REG

Hi-z

IREF

monitor

CSCLK High Time

Analog

Output

1 2 ... 24 25 26 27 28 29 30 31 32 33 34 ... 67 68

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